![]() |
Apollo Register Documentation v${version}
|
0x00000000: | CFG - Configuration Register |
0x00000004: | STAT - Status Register |
0x00000008: | PWDKEY - Key Register for Powering Down the Voltage Comparator |
0x00000200: | INTEN - Voltage Comparator Interrupt registers: Enable |
0x00000204: | INTSTAT - Voltage Comparator Interrupt registers: Status |
0x00000208: | INTCLR - Voltage Comparator Interrupt registers: Clear |
0x0000020C: | INTSET - Voltage Comparator Interrupt registers: Set |
Instance 0 Address: | 0x4000C000 |
The Voltage Comparator Configuration Register contains the software control for selecting beween the 4 options for the positive input as well as the multiple options for the reference input.
// // Register access is all performed through the standard CMSIS structure-based // interface. This includes module-level structure definitions with members and // bitfields corresponding to the physical registers and bitfields within each // module. In addition, Ambiq has provided instance-level macros for modules // that have more than one physical instance and a generic AM_REGVAL() macro // for directly accessing memory by address. // // The following examples show how to use these structures and macros: // Setting the ADC configuration register... AM_REGVAL(0x50010000) = 0x1234; // by address. ADC->CFG = 0x1234; // by structure pointer. ADCn(0)->CFG = 0x1234; // by structure pointer (with instance number). // Changing the ADC clock... ADCn(0)->CFG_b.CLKSEL = 0x2; // by raw value. ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; // using an enumerated value.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
RSVD
0x0 |
LVLSEL
0x0 |
RSVD
0x0 |
NSEL
0x0 |
RSVD
0x0 |
PSEL
0x0 |
Bits | Name | RW | Description |
---|---|---|---|
31:20 | RSVD | RO | This bitfield is reserved for future use. |
19:16 | LVLSEL | RW | When the reference input NSEL is set to NSEL_DAC, this bitfield selects the voltage level for the negative input to the comparator. 0P58V = 0x0 - Set Reference input to 0.58 Volts. 0P77V = 0x1 - Set Reference input to 0.77 Volts. 0P97V = 0x2 - Set Reference input to 0.97 Volts. 1P16V = 0x3 - Set Reference input to 1.16 Volts. 1P35V = 0x4 - Set Reference input to 1.35 Volts. 1P55V = 0x5 - Set Reference input to 1.55 Volts. 1P74V = 0x6 - Set Reference input to 1.74 Volts. 1P93V = 0x7 - Set Reference input to 1.93 Volts. 2P13V = 0x8 - Set Reference input to 2.13 Volts. 2P32V = 0x9 - Set Reference input to 2.32 Volts. 2P51V = 0xA - Set Reference input to 2.51 Volts. 2P71V = 0xB - Set Reference input to 2.71 Volts. 2P90V = 0xC - Set Reference input to 2.90 Volts. 3P09V = 0xD - Set Reference input to 3.09 Volts. 3P29V = 0xE - Set Reference input to 3.29 Volts. 3P48V = 0xF - Set Reference input to 3.48 Volts. |
15:10 | RSVD | RO | This bitfield is reserved for future use. |
9:8 | NSEL | RW | This bitfield selects the negative input to the comparator. VREFEXT1 = 0x0 - Use external reference 1 for reference input. VREFEXT2 = 0x1 - Use external reference 2 for reference input. VREFEXT3 = 0x2 - Use external reference 3 for reference input. DAC = 0x3 - Use DAC output selected by LVLSEL for reference input. |
7:2 | RSVD | RO | This bitfield is reserved for future use. |
1:0 | PSEL | RW | This bitfield selects the positive input to the comparator. VDDADJ = 0x0 - Use VDDADJ for the positive input. VTEMP = 0x1 - Use the temperature sensor output for the positive input. Note: If this channel is selected for PSEL, the bandap circuit required for temperature comparisons will automatically turn on. The bandgap circuit requires 11us to stabalize. VEXT1 = 0x2 - Use external voltage 0 for positive input. VEXT2 = 0x3 - Use external voltage 1 for positive input. |
Instance 0 Address: | 0x4000C004 |
Status Register
// // Register access is all performed through the standard CMSIS structure-based // interface. This includes module-level structure definitions with members and // bitfields corresponding to the physical registers and bitfields within each // module. In addition, Ambiq has provided instance-level macros for modules // that have more than one physical instance and a generic AM_REGVAL() macro // for directly accessing memory by address. // // The following examples show how to use these structures and macros: // Setting the ADC configuration register... AM_REGVAL(0x50010000) = 0x1234; // by address. ADC->CFG = 0x1234; // by structure pointer. ADCn(0)->CFG = 0x1234; // by structure pointer (with instance number). // Changing the ADC clock... ADCn(0)->CFG_b.CLKSEL = 0x2; // by raw value. ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; // using an enumerated value.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
RSVD
0x0 |
PWDSTAT
0x0 |
CMPOUT
0x0 |
Bits | Name | RW | Description |
---|---|---|---|
31:2 | RSVD | RO | This bitfield is reserved for future use. |
1 | PWDSTAT | RO | This bit indicates the power down state of the voltage comparator. POWERED_DOWN = 0x1 - The voltage comparator is powered down. |
0 | CMPOUT | RO | This bit is 1 if the positive input of the comparator is greater than the negative input. VOUT_LOW = 0x0 - The negative input of the comparator is greater than the positive input. VOUT_HIGH = 0x1 - The positive input of the comparator is greater than the negative input. |
Instance 0 Address: | 0x4000C008 |
Write a value of 0x37 to unlock, write any other value to lock. This register also indicates lock status when read. When in the unlccked state (i.e. 0x37 has been written), it reads as 1. When in the locked state, it reads as 0.
// // Register access is all performed through the standard CMSIS structure-based // interface. This includes module-level structure definitions with members and // bitfields corresponding to the physical registers and bitfields within each // module. In addition, Ambiq has provided instance-level macros for modules // that have more than one physical instance and a generic AM_REGVAL() macro // for directly accessing memory by address. // // The following examples show how to use these structures and macros: // Setting the ADC configuration register... AM_REGVAL(0x50010000) = 0x1234; // by address. ADC->CFG = 0x1234; // by structure pointer. ADCn(0)->CFG = 0x1234; // by structure pointer (with instance number). // Changing the ADC clock... ADCn(0)->CFG_b.CLKSEL = 0x2; // by raw value. ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; // using an enumerated value.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PWDKEY
0x0 |
Bits | Name | RW | Description |
---|---|---|---|
31:0 | PWDKEY | RW | Key register value. Key = 0x37 - Key value to unlock the register. |
Instance 0 Address: | 0x4000C200 |
Set bits in this register to allow this module to generate the corresponding interrupt.
// // Register access is all performed through the standard CMSIS structure-based // interface. This includes module-level structure definitions with members and // bitfields corresponding to the physical registers and bitfields within each // module. In addition, Ambiq has provided instance-level macros for modules // that have more than one physical instance and a generic AM_REGVAL() macro // for directly accessing memory by address. // // The following examples show how to use these structures and macros: // Setting the ADC configuration register... AM_REGVAL(0x50010000) = 0x1234; // by address. ADC->CFG = 0x1234; // by structure pointer. ADCn(0)->CFG = 0x1234; // by structure pointer (with instance number). // Changing the ADC clock... ADCn(0)->CFG_b.CLKSEL = 0x2; // by raw value. ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; // using an enumerated value.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
RSVD
0x0 |
OUTHI
0x0 |
OUTLOW
0x0 |
Bits | Name | RW | Description |
---|---|---|---|
31:2 | RSVD | RO | This bitfield is reserved for future use. |
1 | OUTHI | RW | This bit is the vcompout high interrupt. |
0 | OUTLOW | RW | This bit is the vcompout low interrupt. |
Instance 0 Address: | 0x4000C204 |
Read bits from this register to discover the cause of a recent interrupt.
// // Register access is all performed through the standard CMSIS structure-based // interface. This includes module-level structure definitions with members and // bitfields corresponding to the physical registers and bitfields within each // module. In addition, Ambiq has provided instance-level macros for modules // that have more than one physical instance and a generic AM_REGVAL() macro // for directly accessing memory by address. // // The following examples show how to use these structures and macros: // Setting the ADC configuration register... AM_REGVAL(0x50010000) = 0x1234; // by address. ADC->CFG = 0x1234; // by structure pointer. ADCn(0)->CFG = 0x1234; // by structure pointer (with instance number). // Changing the ADC clock... ADCn(0)->CFG_b.CLKSEL = 0x2; // by raw value. ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; // using an enumerated value.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
RSVD
0x0 |
OUTHI
0x0 |
OUTLOW
0x0 |
Bits | Name | RW | Description |
---|---|---|---|
31:2 | RSVD | RO | This bitfield is reserved for future use. |
1 | OUTHI | RW | This bit is the vcompout high interrupt. |
0 | OUTLOW | RW | This bit is the vcompout low interrupt. |
Instance 0 Address: | 0x4000C208 |
Write a 1 to a bit in this register to clear the interrupt status associated with that bit.
// // Register access is all performed through the standard CMSIS structure-based // interface. This includes module-level structure definitions with members and // bitfields corresponding to the physical registers and bitfields within each // module. In addition, Ambiq has provided instance-level macros for modules // that have more than one physical instance and a generic AM_REGVAL() macro // for directly accessing memory by address. // // The following examples show how to use these structures and macros: // Setting the ADC configuration register... AM_REGVAL(0x50010000) = 0x1234; // by address. ADC->CFG = 0x1234; // by structure pointer. ADCn(0)->CFG = 0x1234; // by structure pointer (with instance number). // Changing the ADC clock... ADCn(0)->CFG_b.CLKSEL = 0x2; // by raw value. ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; // using an enumerated value.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
RSVD
0x0 |
OUTHI
0x0 |
OUTLOW
0x0 |
Bits | Name | RW | Description |
---|---|---|---|
31:2 | RSVD | RO | This bitfield is reserved for future use. |
1 | OUTHI | RW | This bit is the vcompout high interrupt. |
0 | OUTLOW | RW | This bit is the vcompout low interrupt. |
Instance 0 Address: | 0x4000C20C |
Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for testing purposes).
// // Register access is all performed through the standard CMSIS structure-based // interface. This includes module-level structure definitions with members and // bitfields corresponding to the physical registers and bitfields within each // module. In addition, Ambiq has provided instance-level macros for modules // that have more than one physical instance and a generic AM_REGVAL() macro // for directly accessing memory by address. // // The following examples show how to use these structures and macros: // Setting the ADC configuration register... AM_REGVAL(0x50010000) = 0x1234; // by address. ADC->CFG = 0x1234; // by structure pointer. ADCn(0)->CFG = 0x1234; // by structure pointer (with instance number). // Changing the ADC clock... ADCn(0)->CFG_b.CLKSEL = 0x2; // by raw value. ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; // using an enumerated value.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
RSVD
0x0 |
OUTHI
0x0 |
OUTLOW
0x0 |
Bits | Name | RW | Description |
---|---|---|---|
31:2 | RSVD | RO | This bitfield is reserved for future use. |
1 | OUTHI | RW | This bit is the vcompout high interrupt. |
0 | OUTLOW | RW | This bit is the vcompout low interrupt. |