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Apollo Register Documentation v${version}
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0xE000E010: | SYSTCSR - SysTick Control and Status Register. |
0xE000E014: | SYSTRVR - SysTick Reload Value Register. |
0xE000E018: | SYSTCVR - SysTick Current Value Register. |
0xE000E01C: | SYSTCALIB - SysTick Calibration Value Register. |
Instance 0 Address: | 0xE000E010 |
SysTick Control and Status Register.
// // Register access is all performed through the standard CMSIS structure-based // interface. This includes module-level structure definitions with members and // bitfields corresponding to the physical registers and bitfields within each // module. In addition, Ambiq has provided instance-level macros for modules // that have more than one physical instance and a generic AM_REGVAL() macro // for directly accessing memory by address. // // The following examples show how to use these structures and macros: // Setting the ADC configuration register... AM_REGVAL(0x50010000) = 0x1234; // by address. ADC->CFG = 0x1234; // by structure pointer. ADCn(0)->CFG = 0x1234; // by structure pointer (with instance number). // Changing the ADC clock... ADCn(0)->CFG_b.CLKSEL = 0x2; // by raw value. ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; // using an enumerated value.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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RSVD
0x0 |
COUNTFLAG
0x0 |
RSVD
0x0 |
TICKINT
0x0 |
ENABLE
0x0 |
Bits | Name | RW | Description |
---|---|---|---|
31:17 | RSVD | RO | RESERVED. |
16 | COUNTFLAG | RO | Returns 1 if timer counted to 0 since last time this was read. |
15:2 | RSVD | RO | RESERVED. |
1 | TICKINT | RW | Enables SysTick exception request. Software can use COUNTFLAG to determine if SysTick has ever counted to zero. 0 = counting down to zero does not assert the SysTick exception request; 1 = counting down to zero asserts the SysTick exception request. |
0 | ENABLE | RW | Enables the counter. 0 = counter disabled; 1 = counter enabled. |
Instance 0 Address: | 0xE000E014 |
SysTick Reload Value Register.
// // Register access is all performed through the standard CMSIS structure-based // interface. This includes module-level structure definitions with members and // bitfields corresponding to the physical registers and bitfields within each // module. In addition, Ambiq has provided instance-level macros for modules // that have more than one physical instance and a generic AM_REGVAL() macro // for directly accessing memory by address. // // The following examples show how to use these structures and macros: // Setting the ADC configuration register... AM_REGVAL(0x50010000) = 0x1234; // by address. ADC->CFG = 0x1234; // by structure pointer. ADCn(0)->CFG = 0x1234; // by structure pointer (with instance number). // Changing the ADC clock... ADCn(0)->CFG_b.CLKSEL = 0x2; // by raw value. ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; // using an enumerated value.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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RSVD
0x0 |
RELOAD
0x0 |
Bits | Name | RW | Description |
---|---|---|---|
31:24 | RSVD | RO | RESERVED. |
23:0 | RELOAD | RW | Value to load into the SYSTCVR register when the counter is enabled and when it reaches 0. |
Instance 0 Address: | 0xE000E018 |
SysTick Current Value Register.
// // Register access is all performed through the standard CMSIS structure-based // interface. This includes module-level structure definitions with members and // bitfields corresponding to the physical registers and bitfields within each // module. In addition, Ambiq has provided instance-level macros for modules // that have more than one physical instance and a generic AM_REGVAL() macro // for directly accessing memory by address. // // The following examples show how to use these structures and macros: // Setting the ADC configuration register... AM_REGVAL(0x50010000) = 0x1234; // by address. ADC->CFG = 0x1234; // by structure pointer. ADCn(0)->CFG = 0x1234; // by structure pointer (with instance number). // Changing the ADC clock... ADCn(0)->CFG_b.CLKSEL = 0x2; // by raw value. ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; // using an enumerated value.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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RSVD
0x0 |
CURRENT
0x0 |
Bits | Name | RW | Description |
---|---|---|---|
31:24 | RSVD | RO | RESERVED. |
23:0 | CURRENT | RW | Reads return the current value of the SysTick counter. A write of any value clears the field to 0, and also clears the SYSTCSR COUNTFLAG bit to 0. |
Instance 0 Address: | 0xE000E01C |
SysTick Calibration Value Register.
// // Register access is all performed through the standard CMSIS structure-based // interface. This includes module-level structure definitions with members and // bitfields corresponding to the physical registers and bitfields within each // module. In addition, Ambiq has provided instance-level macros for modules // that have more than one physical instance and a generic AM_REGVAL() macro // for directly accessing memory by address. // // The following examples show how to use these structures and macros: // Setting the ADC configuration register... AM_REGVAL(0x50010000) = 0x1234; // by address. ADC->CFG = 0x1234; // by structure pointer. ADCn(0)->CFG = 0x1234; // by structure pointer (with instance number). // Changing the ADC clock... ADCn(0)->CFG_b.CLKSEL = 0x2; // by raw value. ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; // using an enumerated value.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
NOREF
0x0 |
SKEW
0x0 |
RSVD
0x0 |
TENMS
0x0 |
Bits | Name | RW | Description |
---|---|---|---|
31 | NOREF | RO | Indicates whether the device provides a reference clock to the processor. 0 = reference clock provided; 1 = no reference clock provided. If your device does not provide a reference clock, the SYST_CSR.CLKSOURCE bit reads-as-one and ignores writes. |
30 | SKEW | RO | Indicates whether the TENMS value is exact. 0 = TENMS value is exact; 1 = TENMS value is inexact, or not given. An inexact TENMS value can affect the suitability of SysTick as a software real time clock. |
29:24 | RSVD | RO | RESERVED. |
23:0 | TENMS | RW | Reload value for 10ms (100Hz) timing, subject to system clock skew errors. If the value reads as zero, the calibration value is not known. |